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Application

Contact / Destructive Electrical Measurements

  • Contamination Analysis
    Semilab provides a range of solutions for semiconductor sample analysis, with the aim of offering comprehensive insights into the behavior and properties of these samples, as well as the impact of various processes.
    One of our advanced tools is the Deep Level Transient Spectroscopy (DLTS) system, available in the Semilab DLS-1100. This technology allows for both qualitative and quantitative analysis of electrically active impurities and defects within semiconductors. It's important to note that this method is destructive in nature. DLTS provides valuable information, including the activation energy of impurities and capture cross-section data. Additionally, it enables the detection of impurity concentrations as low as 5×107 atoms/cm3, depending on the initial doping levels of the material.
    PRODUCT
    Deep Level Transient Spectroscopy (DLTS) is a potent technology for detecting and identifying electrically active defects, commonly known as traps, in semiconductors. These traps can arise due to contamination or crystal defects. DLTS is an incredibly versatile method for assessing various parameters related to deep traps, including their energy levels, capture cross-sections, and concentration distributions. It is capable of identifying impurities and can detect contamination concentrations as low as 5×107 atoms/cm3.
    DLTS is a destructive technique that involves forming either a Schottky diode or a p-n junction using a small sample, typically obtained by cutting from a complete wafer.
    The system consists of either the DLS-83D, DLS-1000, or DLS-1100, along with one of the four cryostats provided by Semilab. Majority carrier traps are observed by applying a reverse bias pulse, while minority carrier traps can be observed with a forward bias pulse.
    The method relies on monitoring the capacitance transient, which is associated with the change in the depletion region width as the diode returns to equilibrium from an initial non-equilibrium state. Since the emission process is rapid, the capacitance transient is small and noisy. To slow down the emission process, various cryostats can be used to cool the sample, typically within the range of 30 K to room temperature (300 K) or above. Cooling the sample results in a longer transient. Through a lock-in averaging technique, peaks at specific emission rates are detected as a function of temperature. By searching for emissions at different frequencies and monitoring the temperature of the associated peak, an Arrhenius plot can be generated to deduce a trap's activation energy. By varying the pulse width, the capture cross-section can be precisely determined.
    With the direct transient recording option, it is possible to extract the complete Arrhenius plot from a single temperature scan, significantly reducing the time required for sample measurement
    PRODUCT
  • Epi resistivity measurement
    Epi (epitaxial) deposition is a CVD (Chemical Vapor Deposition) process used to add a blanket layer of silicon to a silicon substrate, altering properties such as resistivity, type, and defect density. Monitoring the thickness of this epi layer is a crucial part of the production process for creating epi wafers. This monitoring is typically conducted on a sample basis or occasionally to verify the proper setup of the epi reactor.
    PRODUCT
    Spreading Resistance Profiling (SRP) provides users with the capability to visualize the complete carrier density, depth, and resistivity profile within a silicon device. SRP has no practical limitations regarding carrier density range, conductivity type, orientation, or profile depth. Designers can utilize SRP to assess how closely their models match real fabricated devices, and Yield Enhancement Engineers can "fingerprint" a fabrication process for easy failure analysis. Additionally, Process Engineers can troubleshoot all silicon doping operations, including epi, ion implantation, and diffusion.

    1.Probe conditioning and qualification - The contact resistance measurement method requires an ideal probe-sample surface contact. To achieve accurate measurements, the probe's surface must be covered with microcontacts. This is why the probe is conditioned using the Gorey-Schneider Grinder.
    2.Calibration (if needed) - During the measurement, the resistance value is obtained, and based on the calibration curve, the corresponding resistivity can be determined.
    3.Sample preparation - Since resistance measurements are conducted on the cleaved edge of the sample, the sample must be polished. It is recommended to use a J90 polishing machine. The BSM angle depends on the inspected structure, layer thickness, and desired spatial resolution.
    4.Measurement - Resistance measurement is performed along the beveled edge. The built-in microscope (available in various magnifications depending on tool type and configuration) allows the operator to designate the measurement path easily and avoid scratches, dirt, or the sample's end.
    5.Analysis - The measured values can be swiftly and easily analyzed using the software, allowing for the following:
    -Identification of junctions and layers of interest
    -Optional data smoothing
    -Calculation of resistance and carrier density
    -Utilization of statistical tools for layer characterization
    -Access to predefined recipes for rapid evaluation and reporting
    -Data export in CSV format
    If the focus is on doping levels and layer depth, these values can be calculated from the Bevel Angle Measurement (BAM). The BAM sensor detects probe displacement on the original surface compared to the beveled surface, with further calculations performed by the software.
    PRODUCT
  • Compound Material Characterization
    Compound materials enable the production of advanced, power devices, ultra-high-frequency radio devices, and more. These emerging products are becoming increasingly common in applications such as electric or hybrid cars and power management and distribution devices for renewable energy sources. To ensure reliable production, it's essential to regularly monitor factors like composition, defects, dopant concentration, electrical properties, and optical qualities. Semilab provides a range of products designed for this purpose.
    PRODUCT
    The MCV (Mercury C-V) systems offer a cost-effective alternative to metal and poly deposition processes. They utilize a pneumatically controlled contact probe design that is non-damaging and highly stable, requiring only a small amount of mercury for consistent CV (Capacitance-Voltage) and IV (Current-Voltage) measurements. MCV is an excellent method for characterizing both bulk/epitaxial and dielectric layers in various applications, especially for process development and monitoring.
    The Hg C-V technique employs a high repeatability vertical arm probe equipped with a 2 cm long capillary containing a small volume of mercury. This probe is electrostatically shielded to minimize stray capacitance and its positional dependence. During the process, the epitaxial wafer is positioned on the stage with the processed side facing up, either manually or using a robot. The Hg probe is then carefully lowered from the top side to establish a high-quality Schottky contact.

    The calculation of dielectric constant relies on two key factors:
    1.Consistency in the area of contact made by the Hg probe.
    2.Precision of ellipsometry measurements for determining oxide thickness.

    Overall, the MCV and Hg C-V techniques provide reliable and efficient solutions for material characterization and measurement processes.
    PRODUCT
  • Electrical characterization of dielectric and interfaces
    Controlling the electrical properties of dielectrics and their interfaces with semiconductors is crucial for achieving high-performance IC devices and optimal yield. Semilab provides metrology solutions for the electrical characterization of critical dielectric layers and processes spanning from the front-end-of-line (FEOL) to the back-end-of-line (BEOL).
    A common application of Semilab's in-line electrical metrology is the replacement of the IC MOS short-loop, which eliminates the need for costly and time-consuming processing. In-line methods offer rapid feedback without the requirement to prepare devices, resulting in increased process tool utilization time for critical products. The two primary MOS measurements being replaced are as follows:
    1.Capacitance-Voltage (C-V) method for determining Dielectric Capacitance, Dielectric Charges, and Dielectric/Semiconductor Interface Quality.
    2.Current-Voltage (I-V) method for measuring Dielectric Leakage and Breakdown.
    The table provides a summary of the dielectric properties measured by Semilab systems, the associated critical IC device parameters affected, and the common process areas where these issues arise.
    PRODUCT
    The MCV (Mercury C-V) systems offer a cost-effective alternative to metal and poly deposition processes. They utilize a pneumatically controlled contact probe design that is non-damaging and highly stable, requiring only a small amount of mercury for consistent CV (Capacitance-Voltage) and IV (Current-Voltage) measurements. MCV is an excellent method for characterizing both bulk/epitaxial and dielectric layers in various applications, especially for process development and monitoring.
    The Hg C-V technique employs a high repeatability vertical arm probe equipped with a 2 cm long capillary containing a small volume of mercury. This probe is electrostatically shielded to minimize stray capacitance and its positional dependence. During the process, the epitaxial wafer is positioned on the stage with the processed side facing up, either manually or using a robot. The Hg probe is then carefully lowered from the top side to establish a high-quality Schottky contact.

    The calculation of dielectric constant relies on two key factors:
    1.Consistency in the area of contact made by the Hg probe.
    2.Precision of ellipsometry measurements for determining oxide thickness.

    Overall, the MCV and Hg C-V techniques provide reliable and efficient solutions for material characterization and measurement processes.
    PRODUCT
  • Laboratory Application
    Troubleshooting the manufacturing process often requires a comprehensive analysis of wafers at various process steps, which may fall outside the scope of in-line and offline process control tools. For this purpose, Semilab offers state-of-the-art laboratory tools with multiple capabilities.
    Semilab is open to cooperating with customers to enhance tool performance and introduce new applications to meet future metrology needs.
    The measurement tools were designed to achieve good tool performance, user-friendly operation, and a low cost of ownership.

    The applications include the following:
    -Wafer contamination characterization
    -Analytical contamination detection in wafers
    -Measurement of electrical parameters at different manufacturing stages
    -Optical characterization of deposited layer parameters
    -Electrical characterization of deposited dielectric layer parameters
    -Measuring surface passivation efficiency and homogeneity
    -Testing accelerated light-induced degradation (LID) and potential-induced degradation (PID) of solar cells.
    PRODUCT
    Deep Level Transient Spectroscopy (DLTS) is a potent technology for detecting and identifying electrically active defects, commonly known as traps, in semiconductors. These traps can arise due to contamination or crystal defects. DLTS is an incredibly versatile method for assessing various parameters related to deep traps, including their energy levels, capture cross-sections, and concentration distributions. It is capable of identifying impurities and can detect contamination concentrations as low as 5×107 atoms/cm3.
    DLTS is a destructive technique that involves forming either a Schottky diode or a p-n junction using a small sample, typically obtained by cutting from a complete wafer.
    The system consists of either the DLS-83D, DLS-1000, or DLS-1100, along with one of the four cryostats provided by Semilab. Majority carrier traps are observed by applying a reverse bias pulse, while minority carrier traps can be observed with a forward bias pulse.
    The method relies on monitoring the capacitance transient, which is associated with the change in the depletion region width as the diode returns to equilibrium from an initial non-equilibrium state. Since the emission process is rapid, the capacitance transient is small and noisy. To slow down the emission process, various cryostats can be used to cool the sample, typically within the range of 30 K to room temperature (300 K) or above. Cooling the sample results in a longer transient. Through a lock-in averaging technique, peaks at specific emission rates are detected as a function of temperature. By searching for emissions at different frequencies and monitoring the temperature of the associated peak, an Arrhenius plot can be generated to deduce a trap's activation energy. By varying the pulse width, the capture cross-section can be precisely determined.
    With the direct transient recording option, it is possible to extract the complete Arrhenius plot from a single temperature scan, significantly reducing the time required for sample measurement
    PRODUCT