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Non-destructive Electrical Measurements

  • Epi resistivity
    Epi (epitaxial) deposition is a CVD (Chemical Vapor Deposition) process used to add a blanket layer of silicon to a silicon substrate, altering properties such as resistivity, type, and defect density. Monitoring the thickness of this epi layer is a crucial part of the production process for creating epi wafers. This monitoring is typically conducted on a sample basis or occasionally to verify the proper setup of the epi reactor.
    PRODUCT
    ACV technology offers non-contact measurements for epi layers or substrate resistivity, reducing costs by eliminating test wafer scrap typically associated with traditional monitoring methods. It can monitor all types of epi substrates, including p/p+, n/n+, p/p-, n/n+/p+, bare n, or n surfaces.
    ACV operates on a concept similar to conventional Hg-probe CV or Schottky-CV techniques. It determines the depletion width by applying varying voltages at the wafer surface and measuring resulting capacitance. The key advantage is that an air bearing is employed to position the sensor extremely close to the wafer surface without physical contact. This non-destructive and contamination-free method enables reliable measurements on actual product wafers.
    An integrated surface treatment chamber, known as PTC (Plasma Treatment Chamber), is used to stabilize the wafer surface after the epi process. This is achieved by creating a uniform native oxide layer that behaves electrically in a predictable manner. The process involves the creation of ozone (O3) by shining UV light into CDA and exposing the wafer to O3 at an elevated temperature (450-490 °C). The result is a passivated native oxide with low charge, low interface states, and a homogeneous structure. Importantly, the PTC process does not adversely affect the wafer's characteristics. For fresh wafers, it stabilizes the surface, while for older wafers, it improves the native oxide layer.
    PRODUCT
    ac-SPV (Alternating Current Surface Photovoltage) analysis is an electro-optical method that enables rapid and non-destructive characterization of the electrical properties of a semiconductor surface, whether it's bare or covered with a thin insulating layer. This method provides simultaneous determination of critical parameters, including near-surface doping concentration, resistivity, surface lifetime, and surface conductivity type.
    Principles of Operation: The ac-SPV method is based on measuring changes in the initial surface barrier height caused by sinusoidal light illumination on the wafer surface. The surface potential barrier is formed due to the presence of interface (surface) state charge and charge in the dielectric film (oxide charge) on the wafer. This method uses photon energy greater than the semiconductor bandgap and maintains the semiconductor surface in a depletion or inversion state with an applied electric field. The resulting ac-SPV signal, detected via a capacitively-coupled electrode, is proportional to the depletion layer width and can be used to calculate other important electrical parameters of the surface region.
    To achieve stable inversion, a pre-treatment is necessary, which involves growing an oxide layer on the wafer's surface in UV chambers and applying Corona charge. For n-type wafers, negative corona charge is applied, while for p-type wafers, positive corona charge is applied in steps until the inversion condition is reached automatically. It's crucial that the applied corona charge remains stable on the surface during measurement to maintain the inversion state. This requirement is met when there is a thin, high-quality oxide layer present on the wafer's surface.
    In UV chambers, the wafer is illuminated in a controlled environment to ensure uniform and dense ozone layer formation above the wafer, leading to fast and uniform oxidation. A desorber is used to remove organic contamination from the wafer and eliminate hydrogen boron pairs.
    PRODUCT
  • Electrical characterization of dielectric and interfaces
    Controlling the electrical properties of dielectrics and their interfaces with semiconductors is crucial for achieving high-performance IC devices and optimal yield. Semilab provides metrology solutions for the electrical characterization of critical dielectric layers and processes spanning from the front-end-of-line (FEOL) to the back-end-of-line (BEOL).
    A common application of Semilab's in-line electrical metrology is the replacement of the IC MOS short-loop, which eliminates the need for costly and time-consuming processing. In-line methods offer rapid feedback without the requirement to prepare devices, resulting in increased process tool utilization time for critical products. The two primary MOS measurements being replaced are as follows:
    1.Capacitance-Voltage (C-V) method for determining Dielectric Capacitance, Dielectric Charges, and Dielectric/Semiconductor Interface Quality.
    2.Current-Voltage (I-V) method for measuring Dielectric Leakage and Breakdown.
    The table provides a summary of the dielectric properties measured by Semilab systems, the associated critical IC device parameters affected, and the common process areas where these issues arise.
    PRODUCT
    Elastic Metal Probe C-V Profiling offers a rapid method for measuring electrical parameters related to dielectrics, such as gate oxides or near-surface resistivity of epitaxial layers. It serves as an effective solution for in-fab process monitoring and product certification of wafers.
    This technique is highly efficient in assessing the electrical properties of dielectrics, pn-junctions, Si, and GaN epitaxial layers on both bare and patterned wafers. Utilizing patented EM-probe technology, measurements are conducted without chemical treatment, eliminating the need for mercury contacts and preventing damage or contamination to the wafer surface.
    Semilab FCV systems employ a small elastic probe to create a temporary gate on the dielectric surface. There are two types of Elastic Material Probes (EM-Probes) used: Type A probe (left) for CV and GV measurements, and surface resistivity measurements, featuring a self-contained dielectric that blocks direct tunneling currents. For IV measurements, a Type C probe (right) is used, which utilizes a unique metal resistant to oxidation, and its oxide is conductive rather than insulating.
    Key parameters obtained from the CV curve measurements include Capacitive Effective Thickness (CET), Equivalent Oxide Thickness (EOT), Density of Interface State (Dit), Flatband Voltage (Vfb), Changing of Flatband Voltage (Delta Vfb), Threshold Voltage (VT), Average Surface Doping (Nsurf), and Surface Resistivity (ρsurf).
    PRODUCT
    Semilab SDI FAaST systems are cutting-edge non-contact electrical metrology tools used in semiconductor device and material manufacturing and development. These systems employ non-contact surface potential probing techniques with illumination and non-invasive surface charging, enabling precise measurement of various parameters related to semiconductor wafers, dielectrics, and interfaces. Importantly, they eliminate the need for dedicated test devices, saving both time and costs.
    One significant application of this Non-Contact C-V profiling metrology is the monitoring of dielectrics in IC manufacturing. What sets it apart from traditional electrical measurements is its preparation-free, non-contact approach, which eliminates the need to prepare MOS capacitors. This results in cost savings and enables rapid data feedback in both manufacturing and R&D settings.
    The non-contact corona-Kelvin metrology utilizes corona discharge in the air to charge a semiconductor wafer. A vibrating capacitor probe, typically a Kelvin-probe, monitors the wafer's response by measuring surface voltage (Vcpd). Monitoring surface voltage in the dark and under strong illumination allows for the separation of two crucial voltage components:
    Dielectric voltage (VD)
    Semiconductor surface potential (Vsb)
    Analysis of the collected charge-voltage data yields valuable electrical parameters, including Dit, Vfb, Qtot (dielectric charge), CD, EOT, and Dielectric Leakage.
    PRODUCT
  • Photovoltaic Industry Process
    Besides Semilab’s own automated wafer sorter platform, Semilab manufactures separate measurement units for integration into automated PV production lines. Semilab has been working together with all the relevant automation companies to integrate the measurement units.

    The equipments cover a diverse range of metrology needs for comprehensive process and quality control in Si PV industry:
    -Incoming wafer inspection and process control during cell manufacturing
    -Measurement in as-cut wafer, textured, after diffusion, after passivation, after ARC deposition, after contact formation states
    -Measurements of geometrical, electrical and optical properties
    -Solutions for mono and multicrystalline silicon materials, Al-BSF, PERC, IBC and heterojunction cell concepts

    All measurement units are designed considering the following directives:
    -Compatibility to state-of-the-art production lines
    -Supporting all the industry standard communication protocols
    -Flexible integration
    -Supporting both ”on-the-fly” and ”stop-and-go” data acquisition modes
    -Compact design
    -Simple integration and support
    -Simple maintenance, rare calibration periods
    -Application of noise reduction solutions
    -Simple and configurable customization of communication protocols
    PRODUCT
    Microwave detected PhotoConductance Decay (µ-PCD) Carrier lifetime measurement is a useful technology for incoming wafer inspection, quality control and process monitoring in wafer manufacturing as well as in solar cell manufacturing. The microwave induced photoconductive decay method is the most common way of measuring minority carrier lifetime in silicon. This method excels due to its reliability, good reproducibility and the short measurement time that permits of making lifetime maps with high resolution.
    Frequent contaminants and their lifetime killing efficiency:

    Contaminants can exist in two molecular states, each affecting carrier lifetime (or diffusion length) differently.
    The change in lifetime, resulting from a shift in the contaminant's state, quantifies the contaminant's concentration:
    Requires a unique method for changing states.
    Constants are empirically derived.
    The contaminant's effect on lifetime may vary with injection level.
    Change can be detected using µ-PCD or SPV techniques.

    µ-PCD technique: This metrology measures recombination properties and defects in silicon photovoltaics and IC manufacturing. It employs a pulse of laser light to generate carriers that alter semiconductor conductivity. The microwave reflection is sensitive to conductivity changes, and the measured signal shows a decay in conductivity. The primary objective is to monitor bulk lifetime parameters, providing information about contaminations and dislocations.
    Role of Crystallinity in Multicrystalline Silicon: Different lifetimes can be observed on various grains.
    Quasi-Steady-State Microwave detected PhotoConductance Decay (QSS-μPCD): This advanced technique introduced by Semilab offers enhanced accuracy, expanded capabilities, and broader applications. It enables the self-consistent determination of two lifetimes frequently used in solar cell manufacturing: excess carrier decay lifetime (Ʈeff.d) and quasi-steady-state effective lifetime (Ʈeff.ss). This forms the basis for determining other crucial recombination parameters over a wide range of steady illumination. The technique retains the unique wafer mapping advantages of μ-PCD.
    In the QSS-μPCD technique, a decay lifetime measurement is performed under a small perturbation transient condition imposed during the steady-state. Steady light is turned on to reach the steady-state condition, and then a short laser pulse generates additional free carriers. Their decay is monitored to determine the decay time constant.
    The laser excitation is small compared to steady-state carrier excitation, ensuring the small perturbation condition is met.
    PRODUCT
    Color Inspection tool with discrete wavelenghts is a powerful and fast method for sorting cells into 3-5 groups based on visual color to make uniform color modules. The idea is to use discrete wavelengths and have multiple linescans across the cell. This configuration has the possibility to individually tune the different wavelengths for optimum performance.
    Up to 6 heads can be put over one 156mm wafer.
    Reflection maps with preliminary single WL head:
    PRODUCT
    Photoluminescent Imaging (PLI) is an effective tool for monitoring multicrystalline, monocast, or monocrystalline wafers. During the measurement, a laser illuminates the silicon block, and an IR camera detects the generated photoluminescent signal. This illumination affects the recombination of charge carriers. If defects are present, there is a chance of radiative recombination, during which a photon is emitted and can be detected by an IR camera. The PL intensity is inversely proportional to defect density and impurity concentration.
    Key System Features:
    -High-quality, fast imaging, even for as-cut wafers
    -Advanced on-the-fly lifetime calibration method
    -Flexible classification based on specific requirements
    -Detection of wafers with broken edges
    -Capability to measure solar wafers at any processing stage for complete process control
    -Accurate tool matching capability
    -Cell efficiency forecasting at the as-cut stage
    -Flexible configurability, from stand-alone to integration in fully automated systems

    1.Types of Detectable Defects:
    1.Material (as-cut wafers):
    2.General contamination density
    3.Edge (corner) contaminations
    4.Multi wafers with high dislocation density
    5.Active grain boundaries
    6.Mono wafers with ring defects (for various reasons)
    7.Pinholes
    8.Cracks

    2.Passivation Control (double-sided passivated samples):
    1.Optional on-the-fly Jo and iVoc mapping

    3.Wiring (finished cells):
    1.Shunt
    2.Edge isolation defects
    3.Bad finger
    This technology aids in identifying and addressing various defects and impurities in semiconductor wafers, ensuring higher-quality solar cells and semiconductor devices.
    PRODUCT
    Thickness is a crucial parameter for controlling silicon PV wafers. By identifying wafers with non-standard thickness and shape, the risk of wafer or cell breakage can be reduced.

    PV wafer thickness is measured for two main purposes:

    1.Ensuring specification compliance: Thickness measurements at different points on the wafer allow for the calculation of key parameters such as average thickness, total thickness variation (TTV), and thickness deviation.
    Obtaining resistivity values: The Eddy current technique, based on thickness information, is used to determine the bulk resistivity of the sample.

    Thickness Measurement (WMT/WML): Capacitive probes are utilized to measure the distance from the wafer surfaces. This approach ensures that the results are independent of surface quality (reflection). The capacitance depends on the distance between the probe and the sample, represented as C = Ɛ ∙ (A/d), where d is the probe-sample distance. Measuring capacitance allows for distance calculation, and measurements from both sides of the sample enable thickness determination.

    Resistivity Measurement: Resistivity measurement relies on the non-contact Eddy current method. An alternating current (AC) flows through a coil positioned close to a conducting material. The coil's magnetic field induces circulating (Eddy) currents in the sample. Eddy current measurement essentially evaluates the electrical loss in the material, which depends on its resistivity. The sensor signal is calibrated against samples certified with 4-point probe measurements